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【獵頭職位：上海需要一位 Physical Design Engineer】聯(lián)系人：Grace-Tai，郵箱：[email protected]，微信也可查詢職位啦！打開手機微信，搜號碼“KTHR_COM”或查找微信公眾帳號“KT人才”或掃描以上二維碼即可添加，歡迎大家關(guān)注！ Key responsibilities/duties: Principle physical design engineer is expected to work on physical implementation in top level or block level in leading edge high performance large scale Asic product in advanced node. Focus on physical implementation including 1.Floorplan/Timing Driven placement & Route； 2.Clock Tree Synthesis； 3.Timing Analysis & closure； 4.Power Analysis； 5.DRC&LVS. Requirements (indicate “must” or “preferred”) Key skills & knowledge: 1.BS/MS in electrical/computer engineering and related； 2.3+ years MS or 5+ years BS 3.Hands on experience in large scale ASIC chip physical design 4.Good understanding of IO Frame and PV 5.Familiar with back-end EDA tools 6.Good script skills required (TCL, perl, unix shell etc.) 7.Good Communication skill with customer and international supporter. 8.Dedicated, hard working and good team player. 9.Successfully gone through several complete development cycles 10.Top level Timing closure experience in advance node as 28nm/14nm is a plus. |
