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臺積電（中國）有限公司 Technology File Engineer 8K-10K 南京 應(yīng)屆畢業(yè)生 碩士及以上 全職 職位誘惑: 設(shè)計(jì)服務(wù)中心 Job Description: 1. Work closely with process RD team to develop DRC/LVS for design readiness. 2. Provide customer support to world-wide leading design house. 3. Initial more innovation to continue optimize development efficiency. 4. Work closely with various departments (Physical design/integration/Device RD/Product/ESD) on their design requirements. 5. Work closely with EDA partner for tool qualification and methodology enhance. Qualifications: 1. Good knowledge of semiconductor FEOL/BEOL process and chip design concepts. Solid understanding of device physics, Layout design is a plus. 2. Knowledge of EDA partner (Mentor, Synopsys, Cadence, etc.) tools suite is a plus. Especially Laker /Virtuoso /Calibre. 3. Scripting and programming experience using several of the following: Perl, Python, C, C++, TCL, Skill. 4. Ability to work across teams to drive a solution, problem solver and self-motivated. 5. The ideal candidate will have experience in DRC/LVS development. 6. MS or above in EE, CS related fields. 職位鏈接：http://www.moore.ren/job/detail.htm?jobId=1200429&invitecode=1f497054-685a-4ac6-8970-54685a0ac6d2 摩爾精英，專注半導(dǎo)體招聘，更多半導(dǎo)體高薪職位 請掃描二維碼 |
