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【獵頭職位：上海需要一位AE】聯(lián)系人：Lily-Zhuang，郵箱：hr@kthr.com，微信也可查詢(xún)職位啦！打開(kāi)手機(jī)微信，搜號(hào)碼“KTHR_COM”或查找微信公眾帳號(hào)“KT人才”或掃描以上二維碼即可添加，歡迎大家關(guān)注！ Roles and Responsibilities: - define system partitioning of s/ccircuits and system; - define HW/SW co-partitioning; - provide technical feasibilities based onsystem simulation and/or FPGA based demonstrator; - propose new technical solutions on s/cand system level; - develop digital part of mixed signalASICs; - coach junior engineers. Qualification Requirement: - master degree in microelectronic circuitsor systems; - > 3ys experience in ASIC digitaldesign; - strong background in digital front-end：HDL coding,verification,synthesies, ATPG generation; - good understanding of ASIC mixed signalflow,top-level integration(Candence based); - experience in FPGAdevelopment,automovtive communication interface consider as a plus; - good communication skills; - foreign languages: English, German (not amust). 
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