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Freescale公司的PXS20是32位雙核雙發射的Power Architecture微控制器,滿足安全標準IEC61511和IEC61508 (SIL3),能降低設計復雜性和減少所用元件.PXS20采用高性能的e200z4d雙核,核頻率高達120MHz,雙發射級流水線核,可變長度編碼(VLE),集成了存儲器管理單元(MMU)和信號處理引擎,帶誤差檢測代碼的4KB指令緩存,主要用在消費類電子,工業控制,太陽能逆變器,機器人，航空航天和馬達控制等.本文介紹了PXS20系列主要特性，方框圖以及TWR-PXS2010模塊主要特性和電路圖。 The PXS20 family of 32-bit Power Architecture® microcontrollers is designed to specifically address the requirements of the safety standards IEC61511 and IEC61508 (SIL3). It reduces design complexity and component count by putting key functional safety features on a single chip with a dual-core, dual-issue architecture, which can be statically switched between lockstep mode (redundant processing and calculations) to decoupled parallel mode (independent core operation). The PXS20 microcontrollers are SafeAssure solutions. The PXS20 series microcontrollers are system-on-chip devices that are built on Power Architecture technology and contain enhancements that improve the architecture’s fit in embedded applications, include additional instruction support for digital signal processing (DSP) and integrate technologies such as an enhanced time processor unit, enhanced queued analog-to-digital converter, Controller Area Network, and an enhanced modular input-output system. The PXS20 family of 32-bit microcontrollers is the latest achievement in integrated safety controllers. The advanced and cost-efficient host processor core of the PXS20 family complies with the Power Architecture embedded category. It operates at speeds as high as 120 MHz and offers high-performance processing optimized for low power consumption. It capitalizes on the available development infrastructure of current Power Architecture devices and is supported with software drivers, operating systems and configuration code to assist with users’ implementations. PXS20系列主要特性: • High-performance e200z4d dual core 32-bit Power Architecture® technology CPU Core frequency as high as 120 MHz – Dual issue five-stage pipeline core – Variable Length Encoding (VLE) – Memory Management Unit (MMU) – 4 KB instruction cache with error detection code – Signal processing engine (SPE) • Memory available – 1 MB flash memory with ECC – 128 KB on-chip SRAM with ECC – Built-in RWW capabilities for EEPROM emulation • SIL3/ASILD innovative safety concept: LockStep mode and Fail-safe protection – Sphere of replication (SoR) for key components (such as CPU core, eDMA, crossbar switch) – Fault collection and control unit (FCCU) – Redundancy control and checker unit (RCCU) on outputs of the SoR connected to FCCU – Boot-time Built-In Self-Test for Memory (MBIST) and Logic (LBIST) triggered by hardware – Boot-time Built-In Self-Test for ADC and flash memory triggered by software – Replicated safety enhanced watchdog – Replicated junction temperature sensor – Non-maskable interrupt (NMI) – 16-region memory protection unit (MPU) – Clock monitoring units (CMU) – Power management unit (PMU) – Cyclic redundancy check (CRC) unit • Decoupled Parallel mode for high-performance use of replicated cores • Nexus Class 3+ interface • Interrupts – Replicated 16-priority controller – Replicated 16-channel eDMA controller • GPIOs individually programmable as input, output or special function • Three 6-channel general-purpose eTimer units • 2 FlexPWM units – Four 16-bit channels per module • Communications interfaces – 2 LINFlexD channels – 3 DSPI channels with automatic chip select generation – 2 FlexCAN interfaces (2.0B Active) with 32 message objects – FlexRay module (V2.1 Rev. A) with 2 channels, 64 message buffers and data rates up to 10 Mbit/s • Two 12-bit analog-to-digital converters (ADCs) – 16 input channels – Programmable cross triggering unit (CTU) to synchronize ADCs conversion with timer and PWM • Sine wave generator (D/A with low pass filter) • On-chip CAN/UART bootstrap loader • Single 3.0 V to 3.6 V voltage supply • Ambient temperature range –40 ℃to 125 ℃ • Junction temperature range –40℃ to 150 ℃ PXS20系列目標應用： Consumer Boiler Heating Control Industrial Programmable Logic Control (PLC) Input-Output Control (I/O Control) Off-Grid Solar Power Inverters Commercial Solar Power Inverters Residential Solar Power Inverters Unmanned Vehicles (Ground, Air, Water) Motion Control Process Control Robot Manipulator Robotic Arm Medical/Healthcare Anesthesia Unit Monitor Ventilators and Respirators Motor Control Stepper Motor 
圖1。PXS20系列方框圖 TWR-PXS2010: PXS20 安全功能MCU模塊 The TWR-PXS2010 module is part of the Freescale Tower System portfolio, a modular development platform that enables rapid prototyping and tool re-use through reconfigurable hardware. Elevate your design to the next level with this industrial power house by building your Tower System today. TWR-PXS2010 reduces design complexity and component count by putting key functional safety features on a single chip with a dual-core, dual-issue architecture, which can be statically switched between lockstep mode (redundant processing and calculations) to decoupled parallel mode (independent core operation). TWR-PXS2010包括： TWR-PXS2010 board with a PXS20 32-bit Power Architecture® MCU Necessary cables DVD with lab tutorials, software, training and collateral Quick Start Guide document. TWR-PXS2010模塊主要特性： Dual e200z4 CPU architecture Dual processing spheres including: CPU, DMA, interrupt controller, crossbar and MPU for logic level fault detection Two statically configurable modes of operation: Lockstep operation (redundant processing and calculations) Dual Parallel Mode (independent core operation Fault Collection Unit, which monitors and manages fault events Error correction coding on RAM and flash memory allows detection/correction of memory errors Designed to address safety requirements outlined in IEC61508 (SIL3)
圖2。TWR-PXS2010模塊外形圖
圖3。TWR-PXS2010模塊電路圖（1）
圖4。TWR-PXS2010模塊電路圖（2）
圖5。TWR-PXS2010模塊電路圖（3）
圖6。TWR-PXS2010模塊電路圖（4）
圖7。TWR-PXS2010模塊電路圖（5） 詳情請見： 
PXS20[1].pdf
(661.1 KB)
TWR-PXS2010SCH[1].pdf
(89.17 KB)
AN4437[1].pdf
(3.44 MB)
來源：互聯網 |
