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NO.594-【獵頭職位：上海需要多位 Senior Analog and MixedSignal Verification】聯(lián)系人：Chloe-Zhang,郵箱：hr@kthr.com，微信也可查詢職位了！打開手機微信，搜號碼“KTHR_COM”或查找微信公眾帳號“KT人才”或掃描以上二維碼即可添加，歡迎大家關(guān)注！ 崗位職責(zé)： 1、Participate in theverification flow optimization to improve automation and productivity toproduce high-quality products. 2、Read IP/SoC designspecs and integration guide to understand the verification requirements andbuild corresponding test plans. 3、Responses to buildblock/SoC testbench based on UVM methodology and create C test cases. 4、The responsibilitiesincludes building test run and regression flow. Triage failures in regressionand help designer root cause the bug. 5、Work includes Buildvarious metrics (passing rate, functional coverage, etc) and analyze thesemetrics. 6、Analyzefunctional/code coverage result and identify the coverage holes. Work withdesign engineer to improve the coverage score. 7、Take SoC RTL/GLS/LOWPower verification on fullchip for owned IPs. 崗位要求： 1、Bachelor abovedegree in Microelectronics or related major; Master above preferred. 2、3+years ofexperience in analog and mixed signal verification (AMS) 3、Key Skills &Knowledge 4、Must have knowledgeon Verilog/SystemVerilog/C/Verilog-AMS/weal . 5、Understanding ofbasic analog building blocks and mixed signal blocks. 6、Good in mixed signalverification approach, flow, debugging skills. 7、Experience inmixed-signal test-benches creation for IP/SoC verification. 8、Must have knowledgeon APB/AHB protocols 9、At least good at oneof the script programing lanange : Perl, Shell,Python,tcl or makefile. 10、Experience in metricbased Verification closure using Code and Functional coverage 11、Strong analyticaland problem solving skills. 12、Experience inUVM-AMS or UVM verification environment creation is plus. 13、Fluent English (bothwritten and spoken) and excellent communication skills is plus. 福利：五險一金 年假15天 補充商業(yè)醫(yī)療
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