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上海需要一位Package Design Engineer

發(fā)布時(shí)間:2017-1-10 15:55    發(fā)布者:KT咨詢
【獵頭職位:上海需要一位Package Design Engineer】聯(lián)系人:Estelle-Lv,郵箱:hr@kthr.com,微信也可查詢職位啦!打開(kāi)手機(jī)微信,搜號(hào)碼“KTHR_COM”或查找微信公眾帳號(hào)“KT人才”或掃描以上二維碼即可添加,歡迎大家關(guān)注!
Summaryof Role:  
Package Design Engineer is responsiblefor large scale ASIC package definition, package model extraction,system-module SI/PI co-simulation and thermal/reliability solution. SupportASIC chip designs on IO planning based on 32nm, 14nm and beyond technology.Manage ASIC package laminate design from definition to manufacture. Exploreadvanced package solutions such as 2.5D, 3D package.

Responsibilities:  
Work scope includes but notlimited to:
1Package solution consultingand evaluation during project bid stage
2Define package netlist basedon chip-package co-design methodology
3IO planning together withphysical designer
4Package ERC checking, packagedesign file checking
5Support customer onsystem-module SI/PI co-simulation
6Package design sign-off
7Develope package designmethodology in China Design Center
8Develope advanced 2.5D, 3Dpackage design solution.

Thecandidate would also have future extended responsibility participating in thedesign planning and sizing for the advanced ASIC/SoC chips, deployment andother application engineering support of the design methodology.

Requirements:   
1EE/ME/CS related backgroundin system/chip design
2Solid knowledge and industryexperience in following areas:
Ø  High speed package/systemdesign experience (High Speed Serdes, DDR, etc.);
Ø  Multiple layers PCB/Laminate(4+) layout experience (Experience with automation and SKILL languageprogramming is a plus);
Ø  Familiar with Industry SI/PIanalysis process, system level modeling and tools (SigXp, Spice, MATLAB etc).
3Good grasp of Perl/TCLscripts under Linux/Unix environment. C programming will be a plus
4Good communication skill inboth English and Mandarin, and willingness to work with a global team. Skill inother languages is a plus
5Understanding of ASICphysical design process/tools, advanced semiconductor technology process anddevice physics is a plus
6Strong teamwork sense, goodlearning competency, self-motivated, and ability to work in diverse areas in aflexible and dynamic environment.

Preferred Qualifications:
1Direct PKG engineer role withindustry experience.

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