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【獵頭職位：上海需要一位 SoC Designer Engineer（IP or Integration）】聯系人：Jessy-He，郵箱：hr@kthr.com，微信也可查詢職位啦！打開手機微信，搜號碼“KTHR_COM ”或查找微信公眾帳號“KT人才”或掃描以上二維碼即可添加，歡迎大家關注！ Job Description: 1、System integration; 2、Simulation and verification of functionalities at both module and chip level; 3、DFT strategy and implementation; 4、ATPG pattern generation and validation; 5、Synthesis and timing closure. Requirements: 1、At least 5-year experience of digital design experience; 2、Familiar with DFT flow (mentor DFT flow is a plus)； 3、Strong skills of Verilog RTL coding, verification and debug; Hands on experience in EDA tools such as Cadence NC-Sim, Synopsys DC, PT, etc; 4、Solid knowledge of documentation of design report; 5、Ability to work well with teammates. |
