深圳需要一位 SoC Design Manager

發布時間：2015-3-30 17:49 發布者：KT咨詢

關鍵詞： SOC , Asic , Verilog

【獵頭職位：深圳需要一位 SoC Design Manager】聯系人：Hunt-wang 郵箱：hr@kthr.com，微信也可查詢職位啦！打開手機微信，搜號碼“KTHR_COM”或查找微信公眾帳號“KT人才”或掃描以上二維碼即可添加，歡迎大家關注！
Key responsibilities/duties:
Job description:
Lead SoC development planning and execution;

Lead SoC ip development, soc integration, and implementation including synthesis, STA, DFT and low power design;

Co-work with verification team on system level verification;

Co-work with backend team on timing closure and sign off;

Lead silicon validation and production support;

Support SW team on driver development and issue debug;

Team building and development.

Qualification:

BS/MS degree in EE or related, with 8+ year experience in IC development;

1+ year experience as design team leader or manager;

Proficient with HDL (Verilog/VHDL), shell/tcl/perl;

Solid knowledge and experience in IC development flow and EDA tools;

Good track record in ASIC/SoC development and delivery;

Experience in multimedia SoC development is a plus;

Experience in backend design is a plus.

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