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NO.594-【獵頭職位：上海需要一位 Engineer, DigitalVerification】聯系人：Chloe-Zhang,郵箱：hr@kthr.com，微信也可查詢職位了！打開手機微信，搜號碼“KTHR_COM”或查找微信公眾帳號“KT人才”或掃描以上二維碼即可添加，歡迎大家關注！ 崗位職責： 1、Participate in theverification flow optimization to improve automation and productivity toproduce high-quality products. 2、Read IP/SoC designspecs and integration guide to understand the verification requirements andbuild corresponding test plans. 3、Responses to buildblock/SoC testbench based on UVM methodology and create C test cases. 4、The responsibilitiesincludes building test run and regression flow. Triage failures in regressionand help designer root cause the bug. 5、Work includes Buildvarious metrics (passing rate, functional coverage, etc) and analyze thesemetrics. 6、Analyzefunctional/code coverage result and identify the coverage holes. Work withdesign engineer to improve the coverage score. 7、Take SoC RTL/GLS/LOWPower verification on fullchip for owned IPs. 崗位要求： 1、BS / MS inelectrical /computer engineering and related or equivalent experience. 2、1 years workingexperience. 3、Programming skillsin Verilog/SystemVerilog/C. 4、Has good digitalverificaiton flow knowledges. 5、At least good at oneof the script programing lanange : Perl, Shell,Python,makefile. 6、Strong analyticalskills and learning ability. 7、Familiar withadvance verification methodology (UVM, VMM, OVM, etc), tools and flow is plus. 8、Experienced verificationflow, including testplan, test, coverage model, testbench, BFM modeling isplus. 9、Familiar with lowpower verification and gate level verification skills is plus. 10、Excellentcommunication skills is plus. 福利：五險一金 年假15天 補充商業醫療 
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