NO.474-【獵頭職位:上海需要一位 IC Package Engineer】聯(lián)系人:Edward-Duan,郵箱:hr@kthr.com,微信也可查詢職位了!打開手機(jī)微信,搜號碼“KTHR_COM”或查找微信公眾帳號“KT人才”或掃描以上二維碼即可添加,歡迎大家關(guān)注! Job Description: 1.As a member of the power package developmentgroup, responsible for the New Product Introduction (NPI), from design throughqualification and release of the product to production and for the developmentof new module package technologies working closely with the product designengineers and the factories. 2.Develop materials, assembly processes, processcontrol plans with material suppliers, assembly vendors during NPI. 3.Develop and implement package design rules andother specifications for module assembly process. 4.Design and qualify new package solutions to meetand exceed the electrical, thermal and mechanical requirements of products. 5.Generate build sheets, package outline drawingsand other specifications required for release of product. 6.Qualify the new products coordinating therequired package level and board level reliability testing with the quality andreliability group and conduct any failure analysis as required. 7.Achieve the target assembly yields for eachproduct during the NPI phase to pass the final gate check to release toproduction. JobRequirement: 1.Masters degree in Engineering or equivalent technicaldiscipline plus 5 years of experience in a package and assembly manufacturingposition which must have included: design and develop new packages includingleadframe, substrate based, System-in-Package with both wirebond and flip chipinterconnects; 2.develop and implement laminate, flipchip bumpingand assembly design rules; 3.good materials background on solder materials,solder joint reliability, die attach, molding compounds; 4.Lead new product introduction of packages indifferent assembly factories, validate the materials, process parameters usingDesign of Experiments (DOE) methodology, and establish necessary processcontrols and monitors prior to production release; 5.Qualify the designed package, materials andprocesses through reliability stress testing; 6.Must be knowledgeable in JEDEC and IPCrequirements for component and board level reliability qualification; 7.Perform failure analysis of defects generatedduring assembly process development and or reliability testing using X-ray, ConfocalScanning Acoustic Microscopy (CSAM), cross-section techniques that includeanalyzing with scanning electron microscope (SEM), Energy Dispersive AnalysisX-ray (EDAX); 8.Project management involving cross functionalteams involving internal groups (Design, Product Marketing, Quality andReliability, Manufacturing), external groups (material and assembly turn-keysuppliers) from the design stage of the product to the production ramp phase. 9.Understanding of Chip-Package interactions,silicon technology design rules, and wafer level packaging is preferred. 福利:五險一金 帶薪年假 員工福利 |