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【獵頭職位：上海需要一位Verification】聯(lián)系人：Jessy-He，郵箱：hr@kthr.com，微信也可查詢職位啦！打開手機(jī)微信，搜號碼“KTHR_COM”或查找微信公眾帳號“KT人才”或掃描以上二維碼即可添加，歡迎大家關(guān)注！ Responsibilities: 1、Participate/LeadASIC digital verification for various IP/SoC projects; 2、Createverification plans with designers; 3、Develop DVarchitecture and verification environment; 4、Verificationexecution and sign-off. Skills Mandatory: 1、Excellentteam working style; 2、SolidIP/SoC verification background:Mass production for verified IP/SoC； 3、Bachelorin EE or CS: At least 5 years working experiences on ASIC digital verification； 4、Master inEE or CS : At least 3 years working experiences on ASIC digital verification； 5、Productionexperiences on verification strategies and testplans; 6、Proficiencyin SystemVerilog/UVM for testbench creation, debug, reuse, constrained-randomstimulus and functional coverage; 7、Productionexperiences on ARM buses, such as AXI/AMBA/APB； 8、Expertlevel knowledge of verification tools ; 9、Familiarwith Linux, csh/Python or any script languages; 10、GoodEnglish skills (read and write). Skills Plus: 1、Productionexperience on simulation acceleration solution; 2、Productionexperience on in-circuit emulation solution; 3、Familiarwith x86 architecture, especially on PCI Express; 4、Familiarwith any RISC architecture (ARM, MIPS, .etc); 5、Familiarwith system modeling; 6、Goodunderstanding on modern Operating systems and virtualization. |
