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【獵頭職位：深圳需要一位 Lead AE】聯(lián)系人：Raymond-Chen，郵箱：hr@kthr.com，微信也可查詢職位啦！打開手機微信，搜號碼“KTHR_COM”或查找微信公眾帳號“KT人才”或掃描以上二維碼即可添加，歡迎大家關注！ JOB SUMMARY： The Lead Applications Engineer is responsible for providing world-class assistance to customers and channel partners in the usage of our products, as well as for leveraging knowledge and relationships to assist in growing our software business in line with the corporate vision and performance expectations. ESSENTIAL FUNCTIONS: Product Support: Support customers promptly and effectively in order to improve customer productivity and satisfaction with Apache BU simulation products particularly in the areas of Power, Power Integrity and Reliability； Apply knowledge in the areas of Custom circuit analysis, RTL design, High-performance VLSI design, Standard cell physical layout, Power-grid extraction, Timing analysis, Noise analysis, and Voltage drop effects with various CAD tools to solve problems in complex System-on-Chip (SoC)； Take ownership of one or more strategic accounts and/or business/technology initiatives for strategic and tactical business needs. Customer Training: Train customers on the usage of Apache products to increase their proficiency, independence, and success; use technical excellence to show leadership to customers in the usage of our products. Key Customer Business Development: Consistently improve our understanding of customer workflow and technical needs and communicate new opportunities and risks to Sales; proactively work to grow the software usage by demonstrating new solutions based on the vision and software. Sales/Pre-sales Assistance: Demonstrate the value of the vision and software to sales prospects through collaboration with direct and indirect Sales in order to grow sales volume in existing markets; Assist in running product evaluations and benchmarks for prospective customers. Leadership: Hold progress update meetings with global and local customers； Mentor local or remote AE team by using tool knowledge and domain expertise. JOB MINIMUM REQUIREMENTS AND QUALIFICATIONS： Minimum BSEE with a minimum of 6 years of experience or MSEE with a minimum of 4 years of experience in VLSI design or PhD in Electrical Engineering with a minimum of 2 years of experience in VLSI design; Custom circuit analysis & design, standard cell physical layout, timing and noise analysis, or voltage drop effects with CAD tools Strong technical knowledge related to EDA tools on layout, STA, Extraction-SPEF/DSPF and Spice; Demonstrated domain expertise in the area of on-chip and system level Power Noise and Reliability; Demonstrated expertise with ultra-low power design methodologies UNIX operating systems and proficiency in scripting using Perl and TCL; IC/ASIC design flow experience from RTL to GDS Consistent record of outstanding customer interaction, written and verbal communication, and presentation skills. OTHER INFORMATION： MSEE is preferred： Demonstrated consistent record of independent time and project management, productivity, meeting objectives and deadlines with no supervision; demonstrated consistent ability to collaborate and work effectively with diverse staff in multiple regions and multiple departments; Competency in general office software applications such as mail tools, document editors, spreadsheets and databases; Local language and English skills, as required; Some traveling will be required. |
