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【獵頭職位：北京需要一位“Principal Design Engineer”】聯(lián)系人：Jilly Ji，郵箱: jilly-ji@kthr.com，QQ：443142994，微信也可查詢職位啦！打開(kāi)手機(jī)微信，搜號(hào)碼“KTHR_COM”或查找微信公眾帳號(hào)“KT人才”或掃描以上二維碼即可添加，歡迎大家關(guān)注！ Responsibilities: 1.Deliver/implement DDR IP. The engineer should be able to act as a strong team member and contributor, leading team projects and initiatives. Exercise judgment within generally defined practices and policies. 2.Be responsible for building and leading a high-performance IC design team, owning the IC micro3.architecture, package and test platform development, refining the EDA design flow 4.Proficiency in logic design, simulation, synthesis, STA and testing 5.Proficiency in Verilog and its simulation environment Qualifications: 1. Essential Qualifications: Must have BS degree with 10+ years of applicable experience, MS degree with 6+ years of applicable experience in electrical engineering, microelectronics, comparable engineering science or solid state physics. 2. Essential that the individual demonstrates strong communication, verbal and written. 3. Requires good communication skills in English. 
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